A charge pump is an electronic circuit block which is commonly used in phase-locked loop circuits. A phase-locked loop (PLL) is a frequency-selective device comprising a phase detector, a loop filter, an amplifier, and a voltage controlled oscillator (VCO) interconnected in known manner to form a feedback system. The charge pump converts the logic level pulses generated by the phase detector into current pulses which are fed to the loop filter. The loop filter integrates the current pulses to produce a control voltage for the voltage controlled oscillator.
The logic level pulses used by the charge pump are commonly referred to as "PUMP UP" or "UP" pulses and "PUMP DOWN" or "DOWN" pulses. In response to these pulses, the charge pump produces an output current I.sub.O. In known manner, the output current I.sub.O is generated according to a logic truth table comprising the "PUMP UP" and "PUMP DOWN" logic pulses.
In addition to the static relationship between the logic pulses and the output current I.sub.O, there is a requirement that the total charge supplied to the loop filter by the charge pump be an accurate reflection of the pulse widths of the UP and DOWN logic signals. For an UP pulse having a width of time T.sub.UP, the charge produced by the charge pump should be I*T.sub.UP coulombs. For a DOWN pulse having a width of time T.sub.DOWN, the charge pump should produce a charge of-I*T.sub.DOWN coulombs. However, in practical charge pump implementations, the pulses of output current I.sub.O cannot be perfectly square due to the limitations of non-zero rise and fall times. Thus, the actual charge supplied by the charge pump to the loop filter will be less than the ideal quantity discussed above. It therefore becomes important that the non-ideality for the DOWN and UP charge pulses be the same for both the UP and DOWN signals so that UP and DOWN logic input pulses having equal width result in a net charge or current of zero. This condition should also hold true if the UP and DOWN pulses overlap or are coincident in time.
Another problem experienced in practical implementations of charge pumps concerns the output leakage current, i.e. a non-zero output current when a zero output current is desired. According to the logic level truth table for a charge pump, there are two conditions calling for zero output current, i.e. UP=DOWN=logic level 0 and UP=DOWN=logic level 1. Of the two conditions, the first condition UP=DOWN=logic level 0 is the most critical since this is the idle condition. Any leakage current in the idle condition will cause the control voltage output from the loop filter to vary and hence the voltage controlled oscillator frequency to drift. It will be appreciated by those skilled in the art that in some systems utilizing a phase-locked loop, a relatively long time may be spent in the idle state and therefore even modest levels of leakage current can cause the phase-locked loop to jitter or even lose frequency lock.
In summary, the practical charge pump should exhibit fast response time, symmetrical response to the input logic level pulses, and virtually zero idle state output leakage current.